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最近到了找工作准备期,之前已将C语言、数据结构与算法、APUE总结完毕,现在需要抓紧将以往项目加以总结。关于 DM368 首先我们先从硬件部分开始讲起,然后再讲环境搭建、系统移植、文件烧写、最后程序开发。
一、认识开发板
参看下面网址可下载 DM368 参考原理图和 Gerber 文件。
DM365 与 DM368 是 pin to pin(即管脚兼容),DM368 与DM365 是芯片主频不一样,一个是 300MHz/270MHZ,另一个是 432MHZ,两者所讲部分是通用的。
参看:DM368
The DM368 is a SoC that is widely compatible to the DM365 with the main difference of a higher processor clock and providing an enhanced video processing performance e.g. for H.264 with up to 1080@30fps. The maximum core frequency rating of this device is 432 MHz. The DDR2 speed is up to 340 MHz and the mDDR speed is 168 MHz. The device is supported by the Codec Engine. The device achieved product state in April 2010.
The related migration guide for moving existing designs from DM365 to this device is pointing out that the supply voltage, the provided power and the heat spreader should be checked to meet the updated requirements of the new SoC. (See also: Analog and Power for DM368) Other hints in that document are merely for clock speed constraints.
参看可下载 DM368 芯片手册和必要的技术文档
参看:TMS320DM368 DaVinci 数字媒体处理器
原理图/方框图
参看:达芬奇 DM368 IP 网络摄像机参考设计 达芬奇 DM368 IP 网络摄像机参考设计
设计和仿真工具
中国授权代理商
参看: 中国授权代理商
二、原理图检查清单
-Less than 270Mhz CPU devices require Core Voltage of 1.2V (CVDD) -Greater than 270 MHz CPU devices require Core Voltage of 1.35V (CVDD)
Switchable I/O supplies (can be connected to either 1.8V or 3.3V depending on need) -VDD_AEMIF1_18_33 : can be used as a power supply for EM_A[3:13], EM_BA0, EM_BA1, EM_CE[0], EM_ADV, EM_CLK, EM_D[8:15]pins, Keyscan, or GPIO pins. -VDD_AEMIF2_18_33: can be used as a power supply for EM_A[0:2], EM_CE[1], EM_WE, EM_OE, EM_WAIT, EM_D[0:7] pins, HPI, Keyscan, or GPIO pins.
Example 1: VDD_AEMIF2_18_33 at 1.8-V for 8-bit NAND VDD_AEMIF1_18_33 at 3.3-V for GPIO. Example 2: VDD_AEMIF1_18_33 and VDD_AEMIF2_18_33 at 1.8-V for 16-bit NAND.
VDD_ISIF_18_33: can be used as a power supply for VPFE pins (CIN[7:0], YIN[7:0], C_WE_FIELD, PCLK), or SPI3 (SPI3_SCLK,SPI3_SIMO,SPI3_SCS[0], SPI3_SCS[1]) or USBDRVVBUS or GPIO pins.
三、开发板图像说明
四、使用指南
五、系统上电顺序
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